i9 BIOS
Leo-Patch 1.6 · Q1HY MoDT · Observations 14 October 2026

Firmware Menus

PCH-IO Configuration

PCH-IO Configuration firmware setup page decoded from AMI HII/IFR resources.

Form ID
0x27ad
Records
57
Parents
Chipset
Children
SerialIo Configuration, PCI Express Configuration, USB Configuration, SATA Configuration, THC Configuration, HD Audio Configuration, Security Configuration, SCS Configuration, ISH Configuration, Pch Thermal Throttling Control, FIVR Configuration, PMC Configuration
Path
Setup / Chipset / PCH-IO Configuration

Record 3024

HD Audio Configuration

Menu Link

HD Audio Subsystem Configuration Settings

Form
PCH-IO Configuration
Opcode
Ref
Question ID
0xb17

Visibility / conditions

  • {"condition_id": 1312, "type": "SuppressIf", "offset": 463793, "expr": ["EqIdVal QuestionId: 0x11BB, Value: 0x4"]}

Permalink

Record 3025

THC Configuration

Menu Link

Touch Host Controller Configuration Settings

Form
PCH-IO Configuration
Opcode
Ref
Question ID
0xb18

Visibility / conditions

  • {"condition_id": 1313, "type": "GrayOutIf", "offset": 463818, "expr": ["EqIdVal QuestionId: 0x11BF, Value: 0x0"]}

Permalink

Record 3027

SCS Configuration

Menu Link

Storage and Communication Subsystem (SCS) Configuration

Form
PCH-IO Configuration
Opcode
Ref
Question ID
0xb1a

Permalink

Record 3030

Skip VCCIN_AUX Configuration

Firmware Value

Skips VCCIN_AUX Configuration if enabled

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb1d
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x790
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard default
1Enabled

Permalink

Record 3033

PCH LAN Controller

Firmware Value

Enable/Disable onboard NIC.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb20
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x9
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1EnabledStandard defaultManufacturing default
0Disabled

Visibility / conditions

  • {"condition_id": 1314, "type": "SuppressIf", "offset": 463984, "expr": ["EqIdVal QuestionId: 0x11BE, Value: 0x0"]}
  • {"condition_id": 1315, "type": "SuppressIf", "offset": 463992, "expr": ["EqIdVal QuestionId: 0x11BD, Value: 0x0"]}

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Record 3034

LAN Wake From DeepSx

Firmware Value

Wake from DeepSx by the assertion of LAN_WAKE# pin

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb21
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x5
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1EnabledStandard defaultManufacturing default
0Disabled

Visibility / conditions

  • {"condition_id": 1314, "type": "SuppressIf", "offset": 463984, "expr": ["EqIdVal QuestionId: 0x11BE, Value: 0x0"]}
  • {"condition_id": 1316, "type": "SuppressIf", "offset": 464035, "expr": ["EqIdVal QuestionId: 0xB20, Value: 0x0", "EqIdVal QuestionId: 0x11BD, Value: 0x0", "Or"]}

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Record 3035

Wake on LAN Enable

Firmware Value

Enable/Disable integrated LAN to wake the system.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb22
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0xc
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1EnabledStandard defaultManufacturing default
0Disabled

Visibility / conditions

  • {"condition_id": 1314, "type": "SuppressIf", "offset": 463984, "expr": ["EqIdVal QuestionId: 0x11BE, Value: 0x0"]}
  • {"condition_id": 1316, "type": "SuppressIf", "offset": 464035, "expr": ["EqIdVal QuestionId: 0xB20, Value: 0x0", "EqIdVal QuestionId: 0x11BD, Value: 0x0", "Or"]}

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Record 3036

SLP_LAN# Low on DC Power

Firmware Value

Enable/Disable SLP_LAN# Low on DC Power.

Firmware help text

Enable/Disable SLP_LAN# Low on DC Power. Please notice this knob only applies to CNVd.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb23
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0xd
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1EnabledStandard defaultManufacturing default
0Disabled

Visibility / conditions

  • {"condition_id": 1314, "type": "SuppressIf", "offset": 463984, "expr": ["EqIdVal QuestionId: 0x11BE, Value: 0x0"]}
  • {"condition_id": 1316, "type": "SuppressIf", "offset": 464035, "expr": ["EqIdVal QuestionId: 0xB20, Value: 0x0", "EqIdVal QuestionId: 0x11BD, Value: 0x0", "Or"]}

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Record 3037

Sensor Hub Type

Firmware Value

Choose the Sensor Hub Type, 'None' will Suppress 'I2C Sensor Hub' Setup Option','I2C' Will Suppress 'ALS' Setup Option and 'USB' will Suppress Both I2C and ALS.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb24
VarStore
Setup
VarStore GUID
EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9
Offset
0x69
Width
1 byte(s)
Range
0 to 2 step 0
ValueLabelMarkers
0NoneStandard defaultManufacturing default
1I2C Sensor Hub
2USB Sensor Hub

Visibility / conditions

  • {"condition_id": 1318, "type": "SuppressIf", "offset": 464174, "expr": ["EqIdVal QuestionId: 0x11BB, Value: 0x1", "Not", "EqIdVal QuestionId: 0x11BB, Value: 0x6", "Not", "And", "EqIdVal QuestionId: 0x11BB, Value: 0x5", "Not", "And"]}

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Record 3038

DeepSx Power Policies

Firmware Value

configure the DeepSx Mode configuration.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb25
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x4
Width
1 byte(s)
Range
0 to 4 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
3Enabled in S4-S5-Battery
1Enabled in S5-Battery
4Enabled in S4-S5
2Enabled in S5

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Record 3039

PS_ON Enable

Firmware Value

Enable or disable PS_ON ()support a new C10 state from the CPU on desktop SKUs that enables a lower power target that will be required by the California Energy Commission (CEC).

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb26
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x1e
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0DisabledStandard defaultManufacturing default

Visibility / conditions

  • {"condition_id": 1320, "type": "SuppressIf", "offset": 464330, "expr": ["EqIdVal QuestionId: 0x11BB, Value: 0x2", "Not"]}

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Record 3040

Wake on WLAN and BT Enable

Firmware Value

Enable/Disable PCI Express Wireless LAN and Bluetooth to wake the system.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb27
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0xe
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0DisabledStandard defaultManufacturing default

Permalink

Record 3041

DeepSx Wake on WLAN and BT Enable

Firmware Value

Enable/Disable PCI Express Wireless LAN and Bluetooth to wake the system from DeepSx.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb28
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0xf
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0DisabledStandard defaultManufacturing default

Visibility / conditions

  • {"condition_id": 1321, "type": "SuppressIf", "offset": 464410, "expr": ["EqIdVal QuestionId: 0xB27, Value: 0x0"]}

Permalink

Record 3042

Disable DSX ACPRESENT PullDown

Firmware Value

Disable PCH internal ACPRESENT PullDown when DeepSx or G3 exit.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb29
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x6
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0Disabled

Default store records

Store IDStore labelValueOption label
0Standard0Disabled

Permalink

Record 3043

High Precision Timer

Firmware Value

Enable or Disable the High Precision Event Timer.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb2a
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x1f
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Visibility / conditions

  • {"condition_id": 1322, "type": "SuppressIf", "offset": 464492, "expr": ["True"]}

Permalink

Record 3044

State After G3

Firmware Value

Specify what state to go to when power is re-applied after a power failure (G3 state).

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0x27a6
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x20
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0S0 StateStandard defaultManufacturing default
1S5 State

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Record 3045

Port 80h Redirection

Firmware Value

Control where the Port 80h cycles are sent.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb2b
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x21
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0LPC BusStandard defaultManufacturing default
1PCIE Bus

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Record 3046

Enhance Port 80h LPC Decoding

Firmware Value

Support the word/dword decoding of port 80h behind LPC

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb2c
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x22
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Visibility / conditions

  • {"condition_id": 1323, "type": "GrayOutIf", "offset": 464597, "expr": ["EqIdVal QuestionId: 0xB2B, Value: 0x0", "Not"]}

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Record 3047

Compatible Revision ID

Firmware Value

Enable/Disable the PCH Compatible Revision ID feature

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0x27a7
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x12
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Default store records

Store IDStore labelValueOption label
0Standard0Disabled

Visibility / conditions

  • {"condition_id": 1324, "type": "GrayOutIf", "offset": 464644, "expr": ["EqIdVal QuestionId: 0x11BC, Value: 0x0"]}

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Record 3048

Legacy IO Low Latency

Firmware Value

Set to enable low latency of legacy IO.

Firmware help text

Set to enable low latency of legacy IO. Some systems require lower IO latency irrespective of power. This is a tradeoff between power and IO latency.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0x27a8
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x76f
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard default

Permalink

Record 3049

PCH Cross Throttling

Firmware Value

Enable/Disable the PCH Cross Throttling feature.

Firmware help text

Enable/Disable the PCH Cross Throttling feature. Only ULT support this feature.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb2d
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x6be
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Permalink

Record 3050

PCH Energy Reporting

Firmware Value

Enable Energy Report.

Firmware help text

Enable Energy Report. MUST set it as ENABLED. This is only for test purpose.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb2e
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x10
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Permalink

Record 3051

LPM S0i2.0

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb2f
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x13
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Permalink

Record 3052

LPM S0i3.0

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb30
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x16
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Permalink

Record 3053

LPM S0i2.1

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb31
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x14
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Visibility / conditions

  • {"condition_id": 1325, "type": "SuppressIf", "offset": 464858, "expr": ["True"]}

Permalink

Record 3054

LPM S0i2.2

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb32
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x15
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Visibility / conditions

  • {"condition_id": 1325, "type": "SuppressIf", "offset": 464858, "expr": ["True"]}

Permalink

Record 3055

LPM S0i3.2

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb33
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x18
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Visibility / conditions

  • {"condition_id": 1325, "type": "SuppressIf", "offset": 464858, "expr": ["True"]}

Permalink

Record 3056

LPM S0i3.3

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb34
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x19
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Visibility / conditions

  • {"condition_id": 1325, "type": "SuppressIf", "offset": 464858, "expr": ["True"]}

Permalink

Record 3057

LPM S0i3.4

Firmware Value

Enable/Disable S0ix sub-state.

Firmware help text

Enable/Disable S0ix sub-state. This setting is for test purpose. S0ix sub-states should be enabled for production.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb35
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x1a
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Visibility / conditions

  • {"condition_id": 1325, "type": "SuppressIf", "offset": 464858, "expr": ["True"]}

Permalink

Record 3058

C10 Dynamic threshold adjustment

Firmware Value

Enable/Disable C10 dynamic threshold adjustment

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb36
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x77d
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard default
1Enabled

Permalink

Record 3059

IEH Mode

Firmware Value

Enable/Bypass IEH Mode

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb37
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x51e
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Bypass ModeStandard defaultManufacturing default
1Enabled

Permalink

Record 3060

Enable TCO Timer

Firmware Value

Enable/Disable TCO timer.

Firmware help text

Enable/Disable TCO timer. When disabled, it disables PCH ACPI timer, stops TCO timer, and ACPI WDAT table will not be published.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb38
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x11
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Permalink

Record 3061

Pcie Pll SSC

Firmware Value

Pcie Pll SSC percentage.AUTO - Keep hw default, no BIOS override.

Firmware help text

Pcie Pll SSC percentage.AUTO - Keep hw default, no BIOS override. Range is 0.0%-2.0%.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb39
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x23
Width
1 byte(s)
Range
0 to 255 step 0
ValueLabelMarkers
255AutoStandard defaultManufacturing default
00.0%
10.1%
20.2%
30.3%
40.4%
50.5%
60.6%
70.7%
80.8%
90.9%
101.0%
111.1%
121.2%
131.3%
141.4%
151.5%
161.6%
171.7%
181.8%
191.9%
202.0%
254Disable

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Record 3062

IOAPIC 24-119 Entries

Firmware Value

Enables/Disables IOAPIC 24-119 Entries.

Firmware help text

Enables/Disables IOAPIC 24-119 Entries. IRQ24-119 may be used by PCH devices. Disabling those interrupts may cause certain devices failure.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb3a
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x6bc
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard defaultManufacturing default

Visibility / conditions

  • {"condition_id": 1326, "type": "SuppressIf", "offset": 465308, "expr": ["EqIdVal QuestionId: 0x118C, Value: 0x2", "Not", "EqIdVal QuestionId: 0x11BB, Value: 0x4", "Not", "And"]}

Permalink

Record 3063

Enable 8254 Clock Gate

Firmware Value

Enables/Disables 8254 clock gate in early phase.

Firmware help text

Enables/Disables 8254 clock gate in early phase. Set 8254CGE is necessary for SLP_S0 support. Platform is albe to disable this policy and set 8254CGE in late phase.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb3b
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x6bd
Width
1 byte(s)
Range
0 to 2 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled
2Enabled In Runtime and S3 Resume

Permalink

Record 3064

Lock PCH Sideband Access

Firmware Value

Lock PCH Sideband access, include SideBand interface lock and SideBand PortID mask for certain end point (e.g.

Firmware help text

Lock PCH Sideband access, include SideBand interface lock and SideBand PortID mask for certain end point (e.g. PSFx). The option is invalid if POSTBOOT SAI is set.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb3c
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x73c
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1EnabledStandard default

Permalink

Record 3065

BIOS Write Protection

Firmware Value

Enable/Disable the PCH BIOS Lock Enable feature.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb3d
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x73d
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0Disabled
1Enabled

Default store records

Store IDStore labelValueOption label
0Standard0Disabled
1Manufacturing0Disabled

Permalink

Record 3066

SPD Write Disable

Firmware Value

Enable/Disable setting SPD Write Disable.

Firmware help text

Enable/Disable setting SPD Write Disable. For security recommendations, SPD write disable bit must be set.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb3e
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x73b
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1TRUEStandard defaultManufacturing default
0FALSE

Permalink

Record 3067

LGMR

Firmware Value

64KB memory block for LGMR (LPC Memory Range Decode)

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb3f
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x739
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0DisabledStandard defaultManufacturing default

Permalink

Record 3068

HOST_C10 reporting to Target

Firmware Value

This option enables HOST_C10 reporting to Target via eSPI Virtual Wire

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb40
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x73a
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

Permalink

Record 3069

OS IDLE Mode

Firmware Value

Enable/Disable OS Idle Mode Feature

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb41
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x76e
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

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Record 3070

S0ix Auto Demotion

Firmware Value

Enable/Disable Host Low Power Mode S0ix Auto-Demotion

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb42
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x25
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1EnabledStandard defaultManufacturing default
0Disabled

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Record 3071

Latch Events C10 Exit

Firmware Value

Enable/Disable Latch Events on C10 Exit

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb43
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x26
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0DisabledStandard defaultManufacturing default

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Record 3072

Hybrid Storage Detection and Configuration Mode

Firmware Value

Select Hybrid Storage Detection and Configuration Mode

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb44
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x775
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Dynamic Configuration for Hybrid Storage Enable
0DisabledStandard defaultManufacturing default

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Record 3073

Cpu Root port used for hybrid storage

Firmware Value

Select cpu root port used for hybrid storage value between 0 to 2

Form
PCH-IO Configuration
Opcode
Numeric
Question ID
0xb45
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x787
Width
1 byte(s)
Range
0 to 255 step 1

Default store records

Store IDStore labelValueOption label
0Standard255

Visibility / conditions

  • {"condition_id": 1327, "type": "SuppressIf", "offset": 465714, "expr": ["EqIdVal QuestionId: 0xB44, Value: 0x0"]}

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Record 3074

Pch root port used for hybrid storage

Firmware Value

Select pch root port used in combination with cpu root port for hybrid storage enter value between 0 to 16

Form
PCH-IO Configuration
Opcode
Numeric
Question ID
0xb46
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x788
Width
1 byte(s)
Range
0 to 255 step 1

Default store records

Store IDStore labelValueOption label
0Standard255

Visibility / conditions

  • {"condition_id": 1328, "type": "SuppressIf", "offset": 465749, "expr": ["EqIdVal QuestionId: 0xB45, Value: 0xFF"]}

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Record 3075

Extended BIOS Range Decode

Firmware Value

Enabling this will make memory cycles falling in a specific area to be redirected to SPI flash controller

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb47
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x77e
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
0DisabledStandard defaultManufacturing default
1Enabled

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Record 3076

ACPI L6D PME Handling

Firmware Value

BIOS through ACPI code can associate specific method to a particular GPE.

Firmware help text

BIOS through ACPI code can associate specific method to a particular GPE. In this case _L6D for Level-triggered Event, BIOS-ACPI can verify PMEENABLE and PMESTATUS of each device that requires GPE related wake.

Form
PCH-IO Configuration
Opcode
OneOf
Question ID
0xb48
VarStore
PchSetup
VarStore GUID
4570B7F1-ADE8-4943-8DC3-406472842384
Offset
0x78a
Width
1 byte(s)
Range
0 to 1 step 0
ValueLabelMarkers
1Enabled
0DisabledStandard defaultManufacturing default

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