Firmware provenance
Public summaries only. The site does not publish ROM binaries, raw reports, SQLite data, or deployment credentials.
Q1HY-ITX-D4-BIOS2024.05.13 was found on an owner-hosted Leo/Q1HY page, with the vendor download area kept as a second orientation link. This is source evidence for comparison, not a recommendation to flash. Archive SHA-256: 8f76372f49eab4920adb3c9b5588e0246cf449d115e9d5084eede7a7fb5ccd0d.
Public ROM 13900HKES.rom SHA-256: 278fb2fdc0c17252f13439c217f8185aeade58be43add807bba5bbf68f477524. Installed dump canonical SHA-256: e74b21f2eaa3dda2baf404bf90f5257dbe2421557dea3b28c181c6cc79d22120.
419 of 420 PE/TE executable bodies matched byte-for-byte between public and installed images. The single differing module changed by 88 bytes in Setup memory-menu IFR resources; code comparisons matched. This supports menu research only; it does not prove whole-ROM compatibility or justify flashing.
The owner-hosted archive notes ReBAR was disabled by default to avoid VGA failures with some discrete cards. The 14 October 2026 stored observation has visible ReBAR enabled, which makes a reversible visible-menu ReBAR disablement a high-value first test.
Generated from catalog version 2026-10-14. Catalog build date: 2026-10-14. Captured installed source SHA: e74b21f2eaa3dda2baf404bf90f5257dbe2421557dea3b28c181c6cc79d22120. Database SHA: 23495e091909d034184b510c7a3a67b9ed76596e65ff40b3b122ecb4b9faff26.
Intel FSP and coreboot PCIe root-port mappings were used as interpretive references. Linux pciutils documentation supports the read-only lspci -Dnn verification commands. The site records conclusions as public summaries rather than redistributing upstream source text.
Intel Raptor Lake FSP UPD header · coreboot PCIe root-port mapping · Linux lspci manual