Leo-Patch 1.6 · Q1HY MoDT · Observations 14 October 2026
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Overview / Manual / CPU Configuration
CPU, Power, Memory
CPU Configuration
CPU Configuration firmware setup page decoded from AMI HII/IFR resources.
Form ID 0x2758
Records 26
Path Setup / Advanced / CPU Configuration / Setup / Advanced / Advanced / CPU Configuration
Record 602
Efficient-core Information Menu Link
Displays the E-core Information
Opcode Ref
Question ID 0x226 Visibility / conditions {"condition_id": 167, "type": "SuppressIf", "offset": 339931, "expr": ["EqIdVal QuestionId: 0x1260, Value: 0x0", "EqIdVal QuestionId: 0x22E, Value: 0x0", "Or"]} Permalink
Record 603
Performance-core Information Menu Link
Displays the P-core Information
Opcode Ref
Question ID 0x227 Visibility / conditions {"condition_id": 168, "type": "GrayOutIf", "offset": 339966, "expr": ["EqIdVal QuestionId: 0x128B, Value: 0x0", "EqIdVal QuestionId: 0x22D, Value: 0x0", "Or"]} Permalink
Enable/Disable moving of DRAM contents to PRM memory when CPU is in C6 state
Opcode OneOf
Question ID 0x2724
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x114
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 170, "type": "SuppressIf", "offset": 340105, "expr": ["EqIdVal QuestionId: 0x12A1, Value: 0x0"]} Permalink
Record 605
CPU Flex Ratio Override Firmware Value
Enable/Disable CPU Flex Ratio Programming
Opcode OneOf
Question ID 0x228
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x3
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Record 606
Hardware Prefetcher Firmware Value
To turn on/off the MLC streamer prefetcher.
Opcode OneOf
Question ID 0x229
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xbf
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Record 607
Adjacent Cache Line Prefetch Firmware Value
To turn on/off prefetching of adjacent cache lines.
Opcode OneOf
Question ID 0x22a
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xc0
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Record 608
Intel (VMX) Virtualization Technology Firmware Value
When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
Opcode OneOf
Question ID 0x2725
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xb9
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 171, "type": "SuppressIf", "offset": 340253, "expr": ["EqIdVal QuestionId: 0x12A0, Value: 0x0"]} {"condition_id": 172, "type": "GrayOutIf", "offset": 340261, "expr": ["EqIdVal QuestionId: 0x1186, Value: 0x1"]} Permalink
Enable/Disable PECI
Opcode OneOf
Question ID 0x22b
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x4
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Enable/Disable the Avx 2 Instructions.
Firmware help text Enable/Disable the Avx 2 Instructions. This is applicable for Performance-core only
Opcode OneOf
Question ID 0x22c
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x2dc
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Record 611
Active Performance-cores Firmware Value
Number of P-cores to enable in each processor package.
Firmware help text Number of P-cores to enable in each processor package. Note: Number of Cores and E-cores are looked at together. When both are {0,0}, Pcode will enable all cores.
Opcode OneOf
Question ID 0x22d
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x6
Width 1 byte(s)
Range 1 to 255 step 0 Visibility / conditions {"condition_id": 173, "type": "GrayOutIf", "offset": 340372, "expr": ["EqIdVal QuestionId: 0x2727, Value: 0x1"]} {"condition_id": 174, "type": "SuppressIf", "offset": 340380, "expr": ["EqIdVal QuestionId: 0x128B, Value: 0x0"]} {"condition_id": 175, "type": "GrayOutIf", "offset": 340388, "expr": ["EqIdVal QuestionId: 0x27E7, Value: 0x1"]} Permalink
Record 612
Active Efficient-cores Firmware Value
Number of E-cores to enable in each processor package.
Firmware help text Number of E-cores to enable in each processor package. Note: Number of Cores and E-cores are looked at together. When both are {0,0}, Pcode will enable all cores.
Opcode OneOf
Question ID 0x22e
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x22f
Width 1 byte(s)
Range 0 to 255 step 0 Visibility / conditions {"condition_id": 173, "type": "GrayOutIf", "offset": 340372, "expr": ["EqIdVal QuestionId: 0x2727, Value: 0x1"]} {"condition_id": 183, "type": "SuppressIf", "offset": 340580, "expr": ["EqIdVal QuestionId: 0x1260, Value: 0x0"]} {"condition_id": 184, "type": "GrayOutIf", "offset": 340588, "expr": ["EqIdVal QuestionId: 0x27E7, Value: 0x1"]} Permalink
Record 613
Limit CPUID Maximum Firmware Value
Disabled for Windows XP
Opcode OneOf
Question ID 0x22f
VarStore AmiWrapperSetup
VarStore GUID C61C31A3-CB5D-46DD-9FE5-8A82BBC72483
Offset 0x2
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 200, "type": "SuppressIf", "offset": 340965, "expr": ["True"]} Permalink
Record 614
Hyper-Threading Firmware Value
Enable or Disable Hyper-Threading Technology.
Opcode OneOf
Question ID 0x2726
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x5
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 201, "type": "SuppressIf", "offset": 341004, "expr": ["EqIdVal QuestionId: 0x129C, Value: 0x0"]} {"condition_id": 202, "type": "GrayOutIf", "offset": 341012, "expr": ["EqIdVal QuestionId: 0x2727, Value: 0x1"]} Permalink
Enable/Disable BIST (Built-In Self Test) on reset
Opcode OneOf
Question ID 0x230
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x7
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Record 616
AP threads Idle Manner Firmware Value
AP threads Idle Manner for waiting signal to run
Opcode OneOf
Question ID 0x231
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x120
Width 1 byte(s)
Range 1 to 3 step 0 Permalink
Enable/Disable AES (Advanced Encryption Standard)
Opcode OneOf
Question ID 0x232
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xba
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 203, "type": "SuppressIf", "offset": 341130, "expr": ["EqIdVal QuestionId: 0x129F, Value: 0x0"]} {"condition_id": 204, "type": "GrayOutIf", "offset": 341138, "expr": ["EqIdVal QuestionId: 0x1186, Value: 0x1"]} Permalink
Enable/Disable Machine Check
Opcode OneOf
Question ID 0x233
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xbb
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Enable/Disable MonitorMWait, if Disable MonitorMwait, the AP threads Idle Manner should not set in MWAIT Loop
Opcode OneOf
Question ID 0x234
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xbc
Width 1 byte(s)
Range 0 to 1 step 0 Permalink
Record 620
Intel Trusted Execution Technology Firmware Value
Enables utilization of additional hardware capabilities provided by Intel (R) Trusted Execution Technology.
Firmware help text Enables utilization of additional hardware capabilities provided by Intel (R) Trusted Execution Technology.
Changes require a full power cycle to take effect.
Opcode OneOf
Question ID 0x2727
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xc1
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 205, "type": "SuppressIf", "offset": 341249, "expr": ["EqIdVal QuestionId: 0x129E, Value: 0x0"]} {"condition_id": 206, "type": "GrayOutIf", "offset": 341257, "expr": ["EqIdVal QuestionId: 0x2725, Value: 0x0", "EqIdVal QuestionId: 0x2A36, Value: 0x0", "Or", "EqIdVal QuestionId: 0x1281, Value: 0x1", "Or"]} Permalink
Record 621
Alias Check Request Firmware Value
Enables Txt Alias Checking capability Changes require full Txt capability before it will take effect.
Firmware help text Enables Txt Alias Checking capability
Changes require full Txt capability before it will take effect.
It is a one time only change, next reboot will be reset.
Opcode OneOf
Question ID 0x235
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xc4
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 207, "type": "SuppressIf", "offset": 341320, "expr": ["EqIdVal QuestionId: 0x129E, Value: 0x0"]} {"condition_id": 208, "type": "GrayOutIf", "offset": 341328, "expr": ["EqIdVal QuestionId: 0x2727, Value: 0x0"]} Permalink
Record 622
DPR Memory Size (MB) Firmware Value
Reserve DPR memory size (0-255) MB
Opcode Numeric
Question ID 0x236
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xbd
Width 2 byte(s)
Range 0 to 255 step 1 Visibility / conditions {"condition_id": 209, "type": "SuppressIf", "offset": 341373, "expr": ["EqIdVal QuestionId: 0x129E, Value: 0x0"]} {"condition_id": 210, "type": "GrayOutIf", "offset": 341381, "expr": ["EqIdVal QuestionId: 0x129D, Value: 0x1", "EqIdVal QuestionId: 0x2725, Value: 0x0", "Or", "EqIdVal QuestionId: 0x2A36, Value: 0x0", "Or", "EqIdVal QuestionId: 0x2727, Value: 0x0", "Or", "EqIdVal QuestionId: 0x22D, Value: 0xFF", "EqIdVal QuestionId: 0x22E, Value: 0xFF", "And", "Not", "Or"]} Permalink
Record 623
Reset AUX Content Firmware Value
Reset TPM Aux content.
Firmware help text Reset TPM Aux content. Txt may not functional after AUX content gets reset.
Opcode OneOf
Question ID 0x237
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0xc3
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 211, "type": "SuppressIf", "offset": 341466, "expr": ["EqIdVal QuestionId: 0x129E, Value: 0x0"]} {"condition_id": 212, "type": "GrayOutIf", "offset": 341474, "expr": ["EqIdVal QuestionId: 0x129D, Value: 0x1", "EqIdVal QuestionId: 0x2725, Value: 0x0", "Or", "EqIdVal QuestionId: 0x2A36, Value: 0x0", "Or", "EqIdVal QuestionId: 0x2727, Value: 0x1", "Or", "EqIdVal QuestionId: 0x22D, Value: 0x0", "Not", "Or", "EqIdVal QuestionId: 0x2726, Value: 0x0", "EqIdVal QuestionId: 0x129C, Value: 0x1", "And", "Or"]} Permalink
Record 624
CPU SMM Enhancement Menu Link
CPU SMM Enhancement
Opcode Ref
Question ID 0x238 Visibility / conditions {"condition_id": 213, "type": "SuppressIf", "offset": 341571, "expr": ["EqIdVal QuestionId: 0x1299, Value: 0x0"]} Permalink
Record 625
FCLK Frequency for Early Power On Firmware Value
FCLK frequency can take values of 400MHz, 800MHz and 1GHz (1GHz not supported for ULT/ULX SKUs)
Firmware help text FCLK frequency can take values of 400MHz, 800MHz and 1GHz (1GHz not supported for ULT/ULX SKUs)
Opcode OneOf
Question ID 0x239
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x126
Width 1 byte(s)
Range 0 to 3 step 0 Visibility / conditions {"condition_id": 214, "type": "SuppressIf", "offset": 341596, "expr": ["EqIdVal QuestionId: 0x129B, Value: 0x0"]} Permalink
Record 626
Total Memory Encryption Firmware Value
Configure Total Memory Encryption (TME) to protect DRAM data from physical attacks.
Opcode OneOf
Question ID 0x2728
VarStore CpuSetup
VarStore GUID B08F97FF-E6E8-4193-A997-5E9E9B0ADB32
Offset 0x229
Width 1 byte(s)
Range 0 to 1 step 0 Visibility / conditions {"condition_id": 215, "type": "SuppressIf", "offset": 341653, "expr": ["EqIdVal QuestionId: 0x129A, Value: 0x0"]} Permalink
Tcc Activation range is 37 to 100.
Firmware help text Tcc Activation range is 37 to 100. 0=Auto, 70=70℃
Opcode Numeric
Question ID 0x2a2f
VarStore Setup
VarStore GUID EC87D643-EBA4-4BB5-A1E5-3F3E36B20DA9
Offset 0xd0f
Width 1 byte(s)
Range 0 to 255 step 0 Permalink